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Combinational Logic Design
Standard representations for logic functions, k map representation of logic functions (SOP m POS forms), Minimization of logical functions for minterms and maxterms (upto 4 variables), Don’t care conditions, Design examples: Arithmetic circuits, BCD - to – 7 segment decoder, Code converters. Quine Mc-Cluskey methods.
Adders and their use as subtractors, Look ahead carry, ALU, Digital comparator, Parity generators/checkers, Static and dynamic hazards for combinational logic. Multiplexers and their use in combinational logic designs, Multiplexer trees, Demultiplexers and their use in combinational logic designs, Decoders , Demultiplexer trees
Sequential Logic Design
1 bit memory cell, Clocked SR, JK, MS J-K flip flop ,D and T flip-flops. Use of preset and clear terminals, Excitation table for flip-flops. Conversion of flip-flops. Application of flip-flops: Registers, Shift registers, Counters (ring counters, twisted ring counters), Sequence generators, Ripple counters, Up/down counters, Synchronous counters, Lock out, Clock skew, Clock jitter. Effect on synchronous designs.
HDLs
Library, Entity, Architecture, Modeling styles, Data objects, Concurrent and sequential statements, Design examples, Using VHDL for basic combinational and sequential circuits, Attributes (required for practical) (Test benches and FSM excluded).
State Machines
Basic design steps- State diagram, State table, State reduction, State assignment, Mealy and Moore machines representation, Implementation, Finite state machine implementation, Sequence detector. Introduction to algorithmic state machine.
Digital Logic Families
Classification of logic families , Characteristics of digital ICs-Speed of operation , Power dissipation, Figure of merit, Fan-in, Fan-out, Current and voltage parameters, Noise immunity, Operating temperatures and power supply requirements.
TTL-operation of TTL NAND gate, Active pull up, Wired AND, Open collector output, Unconnected inputs. Tri-state logic.
CMOS logic – CMOS inverter, NAND,NOR gates, Unconnected inputs, Wired logic , Open drain output.
Interfacing CMOS and TTL.
Comparison table of characteristics of TTL, CMOS, ECL, RTL, I2L, DCTL.
Programmable Logic Devices and Semiconductor Memories
Programmable logic devices: Detail architecture, Study of PROM, PAL, PLA, Designing combinational circuits using PLDs.
Semiconductor memories: Memory organization and operation, Expanding memory size, Classification and characteristics of memories, RAM, ROM, EPROM, EEPROM, NVRAM, SRAM, DRAM, Expanding memory size, Synchronous DRAM (SDRAM), Double Data Rate SDRAM, Synchronous SRAM, DDR and QDR SRAM,
Content Addressable Memory.
ISBN - 9788184316308
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