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HIGH-SPEED DIGITAL SYSTEM DESIGN: A HANDBOOK OF INTERCONNECT THEORY AND DESIGN PRACTICES

	High-Speed Digital System Design: A Handbook Of Interconnect Theory And Design Practices by Stephen H. Hall, Garrett W. Hall, James A. Mccall
	Price : Rs 3495.00
	Your Price : Rs 2970.75

Currently available books do not solve the problem because they are either highly theoretical or attempt to provide practical details without sufficient theoretical foundation. This book will be a compromise between these two types and will present theory in the context of relevant real life design examples. After reading the book and working through examples and exercises, the reader will have completed a real life design of a high-speed computer bus.Preface.
1. The Importance of Interconnect Design.
1.1 The Basics.
1.2 The Past and the Future.

2. Ideal Transmission Line Fundamentals.
2.1 Transmission Line Structures on a PCB or MCM.
2.2 Wave Propagation.
2.3 Transmission Line Parameters.
2.4 Launching Initial Wave and Transmission Line Reflections.
2.5 Additional Examples.

3. Crosstalk.
3.1 Mutual Inductance and Mutual Capacitance.
3.2 Inductance and Capacitance Matrix.
3.3 Field Simulators.
3.4 Crosstalk-Induced Noise.
3.5 Simulating Crosstalk Using Equivalent Circuit Models.
3.6 Crosstalk-Induced Flight Time and Signal Integrity Variations.
3.7 Crosstalk Trends.
3.8 Termination of Odd- and Even-Mode Transmission Line Pairs.
3.9 Minimization of Crosstalk.
3.10 Additional Examples.

4. Nonideal Interconnect Issues.
4.1 Transmission Line Losses.
4.2 Variations in the Dielectric Constant.
4.3 Serpentine Traces.
4.4 Intersymbol Interference.
4.5 Effects of 90ô€‚“Bends.
4.6 Effect of Topology.

5. Connectors, Packages and Vias.
5.1 Vias.
5.2 Connectors.
5.3 Chip Packages.

6. Nonideal Return Paths, Simultaneous Switching Noise and Power Delivery.
6.1 Nonideal Current Return Paths.
6.2 Local Power Delivery Networks.
6.3 SSO/SSN.

7. Buffer Modeling.
7.1 Types of Models.
7.2 Basic CMOS Output Buffer.
7.3 Output Buffers That Operate in the Saturation Region.
7.4 Conclusions.

8. Digital Timing Analysis.
8.1 Common-Clock Timing.
8.2 Source Synchronous Timing.
8.3 Alternative Bus Signaling Techniques.

9. Design Methodologies.
9.1 Timings.
9.2 Timing Metrics, Signal Quality Metrics, and Test Loads.
9.3 Design Optimization.
9.4 Sensitivity Analysis.
9.5 Design Guidelines.
9.6 Extraction.
9.7 General Rules of Thumb to Follow When Designing a System.

10. Radiated Emissions Compliance and System Noise Minimization.
10.1 FCC Radiated Emission Specifications.
10.2 Physical Mechanisms of Radiation.
10.3 Decoupling and Choking.
10.4 Additional PCB Design Criteria, Package Considerations and Pin-Outs.
10.5 Enclosure (Chassis) Considerations.
10.6 Spread Spectrum Clocking.

11. High-Speed Measurement Techniques.
11.1 Digital Oscilloscopes.
11.2 Times-Domain Reflectometry.
11.3 TDR Accuracy.
11.4 Impedance Measurement.
11.5 Odd- and Even-Mode Impedance.
11.6 Crosstalk Noise.
11.7 Propagation Velocity.
11.8 Vector Network Analyzer.

Appendix A: Alternative Characteristic Impedance Formulas.
A.1 Microstrip.
A.2 Symmetric Stripline.
A.3 Offset Stripline.

Appendix B: GTL Current-Mode Analysis.
B.1 Basic GTL Operation.
B.2 GTL Transitions When a Middle Agent Is Driving.
B.3 GTL Transitions When an End Agent With a Termination Is Driving.
B.4 Transitions When There is a Pull-Up at the Middle Agent.

Appendix C: Frequency-Domain Components in a Digital Signal.

Appendix D: Useful S-Parameter Conversions.
D.1 ABCD, Z and Y Parameters.
D.2 Normalizing the S Matrix to a Different Characteristic Impedance.
D.3 Derivation of the Formulas Used to Extract the Mutual Inductance and Capacitance from a Short Structure Using S21 Measurements.
D.4 Derivation of the Formula to Extract Skin Effect Resistance from a Transmission Line.

Appendix E: Definition of the Decibel.

Appendix F: FCC Emission Limits.

Bibliography.
Index.ISBN - 9788126548095

Pages : 364